1. Field of the Invention
The present invention relates to a technology for operating a source driver of a liquid crystal display, and more particularly, to a source driver circuit for a liquid crystal display (LCD), which can prevent an inferior image from being displayed by noisy data which is provided from a source driver to an LCD panel when power is turned on.
2. Description of the Related Art
In general, an LCD includes an LCD panel having pixel regions in which a plurality of gate lines and a plurality of data lines are perpendicularly arranged in a matrix form, a driver circuit which provides driving signals and data signals to the LCD panel, and a backlight which provides light to the LCD panel.
The driver circuit includes a source driver which provides data signals to the respective data lines of the LCD panel, a gate driver which applies gate driving pulses to the respective gate lines of the LCD panel, and a timing controller which receives display data and control signals, such as vertical and horizontal synchronization signals and clock signals, which are inputted from a driving system of the LCD panel, and outputs the received display data and control signals at a timing which is suitable for the source driver and the gate driver to reproduce an image.
FIG. 1 illustrates a power-on sequence of a conventional LCD panel.
When a first power supply voltage VCC rises up to a target level, a second power supply voltage VDD rises up to a middle level. At this time, a reset signal Reset begins to rise toward a target level, and the second power supply voltage VDD is maintained at a middle level for time t1 and then rises to a final target level. When time t2 elapses, the reset signal Reset reaches the target level. When time t3 elapses and time t4 starts, a first gate start pulse GSP is provided and then valid data begins to be provided through the timing controller and the source driver. The first power supply voltage VCC refers to a power supply voltage which drives a logic circuit of the source driver, and the second power supply voltage VDD refers to a power supply voltage which drives the source driver.
As described above, the two power supply voltages VCC and VDD are applied with time difference before the valid data is provided from the source driver to the LCD panel. In this case, an input terminal of an output buffer included in the source driver is floated and thus unclear noisy data is provided to the LCD panel. Accordingly, noisy image is displayed in time periods t2 and t3 as shown in FIG. 2(a), and a normal display operation is achieved after a time period t4 as shown in FIG. 2(b).
As such, when the conventional source driver is used, unclear noisy data is outputted on the LCD panel before valid data is outputted to the LCD panel. Noisy image displayed on the LCD panel gives a user an unpleasant feeling and also degrades the reliability of products.